Matrices, AXI4 Stream Verification Components and cosimulation

• Single-Input-Single-Output (SISO) AXI4 Stream DSP core

  • https://vunit.github.io/examples.html#array-and-axi4-stream-verification-components

  • https://ghdl.github.io/ghdl-cosim/vhpidirect/examples/arrays.html#array-and-axi4-stream-verification-components

• Framebuffer to PNG/X11

  • https://ghdl.github.io/ghdl-cosim/vhpidirect/examples/arrays.html#vga-rgb-image-buffer

• VUnitCoSim

  • https://github.com/VUnit/vunit/pull/568

TBC